The present disclosure relates to implementing an interface standard and more specifically, to transparent exploitation of a high-speed interface standard with an unmodified legacy application.
Coherent Accelerator Processor Interface (CAPI) technology provides accelerated I/O functionality and memory coherency between a processor and a hardware accelerator. Because interface adapters contain their own memory management unit, which performs address translation and exception generation logic, they do not require translation control entry to access memory. Thus having the ability to read and write to an application's memory, the interface system can accelerate I/O functionality.